SW Engineer - Logic Synthesis

Lattice Semiconductor
San Jose, California
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Job Description
Lattice Overview:
Lattice Semiconductor (NASDAQ: LSCC) is the global leader in smart connectivity solutions, providing market-leading intellectual property and low-power, small form-factor devices that enable more than 8,000 global customers to quickly deliver innovative and differentiated cost and power-efficient products.

The Company's broad, end-market exposure solves customer problems across the network from the Edge to the Cloud for clients in consumer electronics, industrial equipment, communications infrastructure, computing, and automotive. Our technology, long-standing relationships, and commitment to world-class support enable our customers to quickly and easily unleash innovative solutions to create a smart, secure, and connected world.

Our control, connect and compute solutions enable the Internet of Things to operate safely, easily, and more autonomously at the edge of the network core. While you may not see our products, you are interacting with them all day, every day. We make your experience smarter and better connected. Join Team Lattice…and help us continue to drive innovation that creates a smarter, better-connected world. Together, we enable what’s next.
Responsibilities & Skills:
What Will You Get to Do?
  • You will contribute in Lattice next generation FPGA product
  • You will write programs in C++ and shell scripts to develop logic synthesis tools
  • You will create test designs, test benches and automated regression test scripts
  • You will perform regression tests and analyze the results
  • You will support team members with logic functional verification
  • You will document functional spec and usage model
  • The ultimate goal is - you will improve the quality of our next-generation FPGA products
Requirements
  • Candidates of BS or MS in Electrical Engineering or Computer Science
  • Proficient with C/C++ and shell scripts
  • Knowledge or experience of logic design, logic optimization and HDL (Verilog)
  • Strong experience in data structures and algorithms
  • Knowledge or experience of FPGA/EDA software, Verilog/VHDL is a plus
  • Enthusiasm to learn
Benefits:
The base pay for this role is between $ 114,000 to $141,000 per year. In addition to base salary, we offer an incentive plan bonus and new hire equity for a competitive total compensation package.

We offer a variety of benefits including medical, dental, vision, FSA or HSA plans, supplemental insurance plans, AD&D, 401k, and more!

Lattice Semiconductor is an EEO/Affirmative Action Employer and does not discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, protected veteran status, disability or any other legally protected status.

Lattice Semiconductor
Engineering
Full Time
Onsite
Competitive
See Description for Experience
2 years ago